\relax 
\@writefile{toc}{\contentsline {chapter}{\numberline {7}System-level Design Space Exploration for Three-Dimensional (3D) SoCs}{108}}
\@writefile{lof}{\addvspace {10\p@ }}
\@writefile{lot}{\addvspace {10\p@ }}
\newlabel{chapter:esl}{{7}{108}}
\citation{Bailey2007}
\@writefile{lof}{\contentsline {figure}{\numberline {7.1}{\ignorespaces Design space exploration in both technology and architecture options for 3D SoCs.}}{109}}
\newlabel{fig:challenge}{{7.1}{109}}
\@writefile{toc}{\contentsline {section}{\numberline {7.1}Introduction}{109}}
\newlabel{sec:C7-intro}{{7.1}{109}}
\citation{Araki2010}
\citation{Su2010}
\citation{Schafer2010}
\@writefile{toc}{\contentsline {section}{\numberline {7.2}Related Work}{110}}
\citation{Mercier2006}
\citation{Dong2009}
\citation{Chen2010}
\citation{Davis2005}
\@writefile{toc}{\contentsline {section}{\numberline {7.3}Preliminaries and Motivational Example}{111}}
\newlabel{sec:C7-backgroud}{{7.3}{111}}
\@writefile{toc}{\contentsline {subsection}{\numberline {7.3.1}Preliminaries on 3D IC Stacking}{111}}
\@writefile{lof}{\contentsline {figure}{\numberline {7.2}{\ignorespaces An illustration of 3D stacking technology.}}{112}}
\newlabel{fig:3D}{{7.2}{112}}
\@writefile{lof}{\contentsline {figure}{\numberline {7.3}{\ignorespaces Conventional ESL design flow for 2D chips.}}{112}}
\newlabel{fig:ESL}{{7.3}{112}}
\@writefile{toc}{\contentsline {subsection}{\numberline {7.3.2}Preliminaries on Architectural Co-design}{112}}
\@writefile{lof}{\contentsline {figure}{\numberline {7.4}{\ignorespaces An motivational example on design choice exploration for 3D SoCs.}}{113}}
\newlabel{fig:C7-example}{{7.4}{113}}
\@writefile{toc}{\contentsline {subsection}{\numberline {7.3.3}An Motivational Example}{113}}
\@writefile{toc}{\contentsline {section}{\numberline {7.4}System-Level Synthesis Framework for 3D ICs}{114}}
\newlabel{sec:C7-framework}{{7.4}{114}}
\@writefile{toc}{\contentsline {subsection}{\numberline {7.4.1}Architecture Synthesis Framework}{114}}
\@writefile{toc}{\contentsline {subsection}{\numberline {7.4.2}Resource Allocation}{115}}
\citation{Kenji1995}
\@writefile{lof}{\contentsline {figure}{\numberline {7.5}{\ignorespaces System-level exploration framework for 3D SoCs.}}{116}}
\newlabel{fig:framework}{{7.5}{116}}
\@writefile{lof}{\contentsline {figure}{\numberline {7.6}{\ignorespaces Outline of the resource allocation algorithm}}{117}}
\newlabel{fig:allocation outline}{{7.6}{117}}
\citation{Sawicki2009}
\citation{Falkenstern2010}
\citation{Cong2004}
\@writefile{toc}{\contentsline {subsection}{\numberline {7.4.3}Layer Assignment}{118}}
\@writefile{lof}{\contentsline {figure}{\numberline {7.7}{\ignorespaces Genetic algorithm flow chart.}}{119}}
\newlabel{fig:flowchart2}{{7.7}{119}}
\@writefile{toc}{\contentsline {subsection}{\numberline {7.4.4}Task Scheduling}{120}}
\@writefile{toc}{\contentsline {subsection}{\numberline {7.4.5}Cost Function}{120}}
\citation{Dong2009}
\citation{Dong2009}
\newlabel{eq:cost function}{{7.1}{121}}
\newlabel{eq:w2w bonding}{{7.2}{122}}
\newlabel{eq:3D area}{{7.3}{122}}
\@writefile{toc}{\contentsline {section}{\numberline {7.5}Analysis and Case Study of 3D ESL\\ Exploration}{122}}
\newlabel{sec:C7-analysis}{{7.5}{122}}
\@writefile{lot}{\contentsline {table}{\numberline {7.1}{\ignorespaces Case study specification}}{123}}
\newlabel{tab:spec}{{7.1}{123}}
\@writefile{lot}{\contentsline {table}{\numberline {7.2}{\ignorespaces Architecture synthesis results}}{123}}
\newlabel{tab:results}{{7.2}{123}}
\@writefile{toc}{\contentsline {section}{\numberline {7.6}Summary}{124}}
\@setckpt{Chapter-7/Chapter-7}{
\setcounter{page}{125}
\setcounter{equation}{3}
\setcounter{enumi}{3}
\setcounter{enumii}{0}
\setcounter{enumiii}{0}
\setcounter{enumiv}{0}
\setcounter{footnote}{0}
\setcounter{mpfootnote}{0}
\setcounter{part}{0}
\setcounter{chapter}{7}
\setcounter{section}{6}
\setcounter{subsection}{0}
\setcounter{subsubsection}{0}
\setcounter{paragraph}{0}
\setcounter{subparagraph}{0}
\setcounter{figure}{7}
\setcounter{table}{2}
\setcounter{lofdepth}{1}
\setcounter{lotdepth}{1}
\setcounter{parentequation}{0}
\setcounter{codelinenumber}{11}
\setcounter{indent}{0}
\setcounter{thisindent}{0}
}
